There are a lot of smart people that I can count on and learn from. It’s very fast-paced and we use the latest technology. There’s a lot of willingness to try out new ideas and then enough people and infrastructure in place to take that idea to production and support it. Project execution is very pragmatic; there’s a good balance between project planning and just getting things done.
It feels like I have a lot of autonomy. The business is very focused on results, so if I can think of ways to improve an existing process or design, that’s well received.
Having the opportunity to build something so challenging I would have thought it impossible. But after being given the freedom to try, I was ultimately successful!
My colleagues have a lot of talent and skill but nobody lets a sense of self-importance get in the way. New ideas are scrutinized, tweaked, and integrated quickly, in a process that’s very focused on efficiency.
The cafeterias are well-stocked. I get to spend more time with my family at home in the morning, since I don’t have to worry about what I’m going to eat for breakfast or lunch.
I leave my house at 7:45 and I’m at my desk by 8. I grab coffee and breakfast and catch up on email. I usually have a few dozen console prompts open with different projects in-progress. Throughout the day, I might be writing code for a new pipeline; trying to adjust existing code to improve timing; lab testing a new build. Often times I’ll grab a conference room with a colleague to sketch out some ideas on a whiteboard while one or the other of us is trying to solve a problem.
I took a VLSI class in college and loved learning about the low-level details of chip design. The following semester I took an FPGA class and loved (even more) that I could implement my really low-level computer architecture ideas quickly by writing code for relatively inexpensive development boards. I like being able to see the results of my changes sooner than would otherwise be possible with a more ASIC-design focused approach. I also enjoy programming in higher level languages like C++ and C#, which I might not have as much time for if I were focused on ASIC design.
There are some great restaurants in Philadelphia and SIG offers discounted gift cards! The regional rail provides convenient access from the quieter suburbs.
My first “real” FPGA project was a Finite Difference Time Domain accelerator. It used 16GB of onboard memory directly connected to a Virtex-II FPGA via 4 parallel DDR SDRAM channels. The board designer thought we were crazy for asking for an FPGA board with DDR DIMMs on it.
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Copyright © 2020 SIG Susquehanna. All rights reserved.